Munich, Germany – April 13 th, 2021 – Codasip, the leading supplier of processor design solutions and customizable RISC-V processor IP, is pleased to announce the availability of Codasip Studio 9.0 ...
Thanks to RISC-V's open nature, more scrappy board developers can produce their own chips without signing legal agreements or ...
The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enhanced implementation (RMX-100D) adds DSP ... The ...
Learn how to incorporate Questa VIP into your existing RISC-V verification flow. This step-by-step tutorial, prepared by Codasip’s verification experts, explains the concepts of combining ...
The third annual RISC-V summit takes place next month, 8-10 December 2020, and like the majority of events this year, will be completely online. The program features three days of talks around ...
What if the future of computing wasn’t locked behind proprietary architectures? Imagine a world where developers and hobbyists alike could harness the power of open source hardware to build, innovate, ...
RISC-V architecture is an open, international standard governing how software interfaces with hardware in a computer. It serves as a shared language that sets the parameters for communication and ...